;--------------------------------------------------------
; File Created by SDCC : FreeWare ANSI-C Compiler
; Version 2.6.0 #4309 (Jul 28 2006)
; This file generated Tue Apr 05 22:14:25 2011
;--------------------------------------------------------
	.module clock
	.optsdcc -mmcs51 --model-large
	
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _TF1
	.globl _TR1
	.globl _TF0
	.globl _TR0
	.globl _IE1
	.globl _IT1
	.globl _IE0
	.globl _IT0
	.globl _SM0
	.globl _SM1
	.globl _SM2
	.globl _REN
	.globl _TB8
	.globl _RB8
	.globl _TI
	.globl _RI
	.globl _CY
	.globl _AC
	.globl _F0
	.globl _RS1
	.globl _RS0
	.globl _OV
	.globl _F1
	.globl _P
	.globl _RD
	.globl _WR
	.globl _T1
	.globl _T0
	.globl _INT1
	.globl _INT0
	.globl _TXD0
	.globl _TXD
	.globl _RXD0
	.globl _RXD
	.globl _P3_7
	.globl _P3_6
	.globl _P3_5
	.globl _P3_4
	.globl _P3_3
	.globl _P3_2
	.globl _P3_1
	.globl _P3_0
	.globl _P2_7
	.globl _P2_6
	.globl _P2_5
	.globl _P2_4
	.globl _P2_3
	.globl _P2_2
	.globl _P2_1
	.globl _P2_0
	.globl _P1_7
	.globl _P1_6
	.globl _P1_5
	.globl _P1_4
	.globl _P1_3
	.globl _P1_2
	.globl _P1_1
	.globl _P1_0
	.globl _P0_7
	.globl _P0_6
	.globl _P0_5
	.globl _P0_4
	.globl _P0_3
	.globl _P0_2
	.globl _P0_1
	.globl _P0_0
	.globl _PS
	.globl _PT1
	.globl _PX1
	.globl _PT0
	.globl _PX0
	.globl _EA
	.globl _ES
	.globl _ET1
	.globl _EX1
	.globl _ET0
	.globl _EX0
	.globl _BREG_F7
	.globl _BREG_F6
	.globl _BREG_F5
	.globl _BREG_F4
	.globl _BREG_F3
	.globl _BREG_F2
	.globl _BREG_F1
	.globl _BREG_F0
	.globl _P5_7
	.globl _P5_6
	.globl _P5_5
	.globl _P5_4
	.globl _P5_3
	.globl _P5_2
	.globl _P5_1
	.globl _P5_0
	.globl _P4_7
	.globl _P4_6
	.globl _P4_5
	.globl _P4_4
	.globl _P4_3
	.globl _P4_2
	.globl _P4_1
	.globl _P4_0
	.globl _PX0L
	.globl _PT0L
	.globl _PX1L
	.globl _PT1L
	.globl _PLS
	.globl _PT2L
	.globl _PPCL
	.globl _EC
	.globl _CCF0
	.globl _CCF1
	.globl _CCF2
	.globl _CCF3
	.globl _CCF4
	.globl _CR
	.globl _CF
	.globl _TF2
	.globl _EXF2
	.globl _RCLK
	.globl _TCLK
	.globl _EXEN2
	.globl _TR2
	.globl _C_T2
	.globl _CP_RL2
	.globl _T2CON_7
	.globl _T2CON_6
	.globl _T2CON_5
	.globl _T2CON_4
	.globl _T2CON_3
	.globl _T2CON_2
	.globl _T2CON_1
	.globl _T2CON_0
	.globl _PT2
	.globl _ET2
	.globl _TMOD
	.globl _TL1
	.globl _TL0
	.globl _TH1
	.globl _TH0
	.globl _TCON
	.globl _SP
	.globl _SCON
	.globl _SBUF0
	.globl _SBUF
	.globl _PSW
	.globl _PCON
	.globl _P3
	.globl _P2
	.globl _P1
	.globl _P0
	.globl _IP
	.globl _IE
	.globl _DP0L
	.globl _DPL
	.globl _DP0H
	.globl _DPH
	.globl _B
	.globl _ACC
	.globl _EECON
	.globl _KBF
	.globl _KBE
	.globl _KBLS
	.globl _BRL
	.globl _BDRCON
	.globl _T2MOD
	.globl _SPDAT
	.globl _SPSTA
	.globl _SPCON
	.globl _SADEN
	.globl _SADDR
	.globl _WDTPRG
	.globl _WDTRST
	.globl _P5
	.globl _P4
	.globl _IPH1
	.globl _IPL1
	.globl _IPH0
	.globl _IPL0
	.globl _IEN1
	.globl _IEN0
	.globl _CMOD
	.globl _CL
	.globl _CH
	.globl _CCON
	.globl _CCAPM4
	.globl _CCAPM3
	.globl _CCAPM2
	.globl _CCAPM1
	.globl _CCAPM0
	.globl _CCAP4L
	.globl _CCAP3L
	.globl _CCAP2L
	.globl _CCAP1L
	.globl _CCAP0L
	.globl _CCAP4H
	.globl _CCAP3H
	.globl _CCAP2H
	.globl _CCAP1H
	.globl _CCAP0H
	.globl _CKCKON1
	.globl _CKCKON0
	.globl _CKRL
	.globl _AUXR1
	.globl _AUXR
	.globl _TH2
	.globl _TL2
	.globl _RCAP2H
	.globl _RCAP2L
	.globl _T2CON
	.globl _clkEMode
	.globl _clkOn
	.globl _dispUpdate_PARM_4
	.globl _dispUpdate_PARM_3
	.globl _dispUpdate_PARM_2
	.globl _clkToggle
	.globl _clkReset
	.globl _dispUpdate
	.globl _emToggle
	.globl _clkInit
	.globl _timerIsr
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
	.area RSEG    (DATA)
G$T2CON$0$0 == 0x00c8
_T2CON	=	0x00c8
G$RCAP2L$0$0 == 0x00ca
_RCAP2L	=	0x00ca
G$RCAP2H$0$0 == 0x00cb
_RCAP2H	=	0x00cb
G$TL2$0$0 == 0x00cc
_TL2	=	0x00cc
G$TH2$0$0 == 0x00cd
_TH2	=	0x00cd
G$AUXR$0$0 == 0x008e
_AUXR	=	0x008e
G$AUXR1$0$0 == 0x00a2
_AUXR1	=	0x00a2
G$CKRL$0$0 == 0x0097
_CKRL	=	0x0097
G$CKCKON0$0$0 == 0x008f
_CKCKON0	=	0x008f
G$CKCKON1$0$0 == 0x008f
_CKCKON1	=	0x008f
G$CCAP0H$0$0 == 0x00fa
_CCAP0H	=	0x00fa
G$CCAP1H$0$0 == 0x00fb
_CCAP1H	=	0x00fb
G$CCAP2H$0$0 == 0x00fc
_CCAP2H	=	0x00fc
G$CCAP3H$0$0 == 0x00fd
_CCAP3H	=	0x00fd
G$CCAP4H$0$0 == 0x00fe
_CCAP4H	=	0x00fe
G$CCAP0L$0$0 == 0x00ea
_CCAP0L	=	0x00ea
G$CCAP1L$0$0 == 0x00eb
_CCAP1L	=	0x00eb
G$CCAP2L$0$0 == 0x00ec
_CCAP2L	=	0x00ec
G$CCAP3L$0$0 == 0x00ed
_CCAP3L	=	0x00ed
G$CCAP4L$0$0 == 0x00ee
_CCAP4L	=	0x00ee
G$CCAPM0$0$0 == 0x00da
_CCAPM0	=	0x00da
G$CCAPM1$0$0 == 0x00db
_CCAPM1	=	0x00db
G$CCAPM2$0$0 == 0x00dc
_CCAPM2	=	0x00dc
G$CCAPM3$0$0 == 0x00dd
_CCAPM3	=	0x00dd
G$CCAPM4$0$0 == 0x00de
_CCAPM4	=	0x00de
G$CCON$0$0 == 0x00d8
_CCON	=	0x00d8
G$CH$0$0 == 0x00f9
_CH	=	0x00f9
G$CL$0$0 == 0x00e9
_CL	=	0x00e9
G$CMOD$0$0 == 0x00d9
_CMOD	=	0x00d9
G$IEN0$0$0 == 0x00a8
_IEN0	=	0x00a8
G$IEN1$0$0 == 0x00b1
_IEN1	=	0x00b1
G$IPL0$0$0 == 0x00b8
_IPL0	=	0x00b8
G$IPH0$0$0 == 0x00b7
_IPH0	=	0x00b7
G$IPL1$0$0 == 0x00b2
_IPL1	=	0x00b2
G$IPH1$0$0 == 0x00b3
_IPH1	=	0x00b3
G$P4$0$0 == 0x00c0
_P4	=	0x00c0
G$P5$0$0 == 0x00d8
_P5	=	0x00d8
G$WDTRST$0$0 == 0x00a6
_WDTRST	=	0x00a6
G$WDTPRG$0$0 == 0x00a7
_WDTPRG	=	0x00a7
G$SADDR$0$0 == 0x00a9
_SADDR	=	0x00a9
G$SADEN$0$0 == 0x00b9
_SADEN	=	0x00b9
G$SPCON$0$0 == 0x00c3
_SPCON	=	0x00c3
G$SPSTA$0$0 == 0x00c4
_SPSTA	=	0x00c4
G$SPDAT$0$0 == 0x00c5
_SPDAT	=	0x00c5
G$T2MOD$0$0 == 0x00c9
_T2MOD	=	0x00c9
G$BDRCON$0$0 == 0x009b
_BDRCON	=	0x009b
G$BRL$0$0 == 0x009a
_BRL	=	0x009a
G$KBLS$0$0 == 0x009c
_KBLS	=	0x009c
G$KBE$0$0 == 0x009d
_KBE	=	0x009d
G$KBF$0$0 == 0x009e
_KBF	=	0x009e
G$EECON$0$0 == 0x00d2
_EECON	=	0x00d2
G$ACC$0$0 == 0x00e0
_ACC	=	0x00e0
G$B$0$0 == 0x00f0
_B	=	0x00f0
G$DPH$0$0 == 0x0083
_DPH	=	0x0083
G$DP0H$0$0 == 0x0083
_DP0H	=	0x0083
G$DPL$0$0 == 0x0082
_DPL	=	0x0082
G$DP0L$0$0 == 0x0082
_DP0L	=	0x0082
G$IE$0$0 == 0x00a8
_IE	=	0x00a8
G$IP$0$0 == 0x00b8
_IP	=	0x00b8
G$P0$0$0 == 0x0080
_P0	=	0x0080
G$P1$0$0 == 0x0090
_P1	=	0x0090
G$P2$0$0 == 0x00a0
_P2	=	0x00a0
G$P3$0$0 == 0x00b0
_P3	=	0x00b0
G$PCON$0$0 == 0x0087
_PCON	=	0x0087
G$PSW$0$0 == 0x00d0
_PSW	=	0x00d0
G$SBUF$0$0 == 0x0099
_SBUF	=	0x0099
G$SBUF0$0$0 == 0x0099
_SBUF0	=	0x0099
G$SCON$0$0 == 0x0098
_SCON	=	0x0098
G$SP$0$0 == 0x0081
_SP	=	0x0081
G$TCON$0$0 == 0x0088
_TCON	=	0x0088
G$TH0$0$0 == 0x008c
_TH0	=	0x008c
G$TH1$0$0 == 0x008d
_TH1	=	0x008d
G$TL0$0$0 == 0x008a
_TL0	=	0x008a
G$TL1$0$0 == 0x008b
_TL1	=	0x008b
G$TMOD$0$0 == 0x0089
_TMOD	=	0x0089
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
	.area RSEG    (DATA)
G$ET2$0$0 == 0x00ad
_ET2	=	0x00ad
G$PT2$0$0 == 0x00bd
_PT2	=	0x00bd
G$T2CON_0$0$0 == 0x00c8
_T2CON_0	=	0x00c8
G$T2CON_1$0$0 == 0x00c9
_T2CON_1	=	0x00c9
G$T2CON_2$0$0 == 0x00ca
_T2CON_2	=	0x00ca
G$T2CON_3$0$0 == 0x00cb
_T2CON_3	=	0x00cb
G$T2CON_4$0$0 == 0x00cc
_T2CON_4	=	0x00cc
G$T2CON_5$0$0 == 0x00cd
_T2CON_5	=	0x00cd
G$T2CON_6$0$0 == 0x00ce
_T2CON_6	=	0x00ce
G$T2CON_7$0$0 == 0x00cf
_T2CON_7	=	0x00cf
G$CP_RL2$0$0 == 0x00c8
_CP_RL2	=	0x00c8
G$C_T2$0$0 == 0x00c9
_C_T2	=	0x00c9
G$TR2$0$0 == 0x00ca
_TR2	=	0x00ca
G$EXEN2$0$0 == 0x00cb
_EXEN2	=	0x00cb
G$TCLK$0$0 == 0x00cc
_TCLK	=	0x00cc
G$RCLK$0$0 == 0x00cd
_RCLK	=	0x00cd
G$EXF2$0$0 == 0x00ce
_EXF2	=	0x00ce
G$TF2$0$0 == 0x00cf
_TF2	=	0x00cf
G$CF$0$0 == 0x00df
_CF	=	0x00df
G$CR$0$0 == 0x00de
_CR	=	0x00de
G$CCF4$0$0 == 0x00dc
_CCF4	=	0x00dc
G$CCF3$0$0 == 0x00db
_CCF3	=	0x00db
G$CCF2$0$0 == 0x00da
_CCF2	=	0x00da
G$CCF1$0$0 == 0x00d9
_CCF1	=	0x00d9
G$CCF0$0$0 == 0x00d8
_CCF0	=	0x00d8
G$EC$0$0 == 0x00ae
_EC	=	0x00ae
G$PPCL$0$0 == 0x00be
_PPCL	=	0x00be
G$PT2L$0$0 == 0x00bd
_PT2L	=	0x00bd
G$PLS$0$0 == 0x00bc
_PLS	=	0x00bc
G$PT1L$0$0 == 0x00bb
_PT1L	=	0x00bb
G$PX1L$0$0 == 0x00ba
_PX1L	=	0x00ba
G$PT0L$0$0 == 0x00b9
_PT0L	=	0x00b9
G$PX0L$0$0 == 0x00b8
_PX0L	=	0x00b8
G$P4_0$0$0 == 0x00c0
_P4_0	=	0x00c0
G$P4_1$0$0 == 0x00c1
_P4_1	=	0x00c1
G$P4_2$0$0 == 0x00c2
_P4_2	=	0x00c2
G$P4_3$0$0 == 0x00c3
_P4_3	=	0x00c3
G$P4_4$0$0 == 0x00c4
_P4_4	=	0x00c4
G$P4_5$0$0 == 0x00c5
_P4_5	=	0x00c5
G$P4_6$0$0 == 0x00c6
_P4_6	=	0x00c6
G$P4_7$0$0 == 0x00c7
_P4_7	=	0x00c7
G$P5_0$0$0 == 0x00d8
_P5_0	=	0x00d8
G$P5_1$0$0 == 0x00d9
_P5_1	=	0x00d9
G$P5_2$0$0 == 0x00da
_P5_2	=	0x00da
G$P5_3$0$0 == 0x00db
_P5_3	=	0x00db
G$P5_4$0$0 == 0x00dc
_P5_4	=	0x00dc
G$P5_5$0$0 == 0x00dd
_P5_5	=	0x00dd
G$P5_6$0$0 == 0x00de
_P5_6	=	0x00de
G$P5_7$0$0 == 0x00df
_P5_7	=	0x00df
G$BREG_F0$0$0 == 0x00f0
_BREG_F0	=	0x00f0
G$BREG_F1$0$0 == 0x00f1
_BREG_F1	=	0x00f1
G$BREG_F2$0$0 == 0x00f2
_BREG_F2	=	0x00f2
G$BREG_F3$0$0 == 0x00f3
_BREG_F3	=	0x00f3
G$BREG_F4$0$0 == 0x00f4
_BREG_F4	=	0x00f4
G$BREG_F5$0$0 == 0x00f5
_BREG_F5	=	0x00f5
G$BREG_F6$0$0 == 0x00f6
_BREG_F6	=	0x00f6
G$BREG_F7$0$0 == 0x00f7
_BREG_F7	=	0x00f7
G$EX0$0$0 == 0x00a8
_EX0	=	0x00a8
G$ET0$0$0 == 0x00a9
_ET0	=	0x00a9
G$EX1$0$0 == 0x00aa
_EX1	=	0x00aa
G$ET1$0$0 == 0x00ab
_ET1	=	0x00ab
G$ES$0$0 == 0x00ac
_ES	=	0x00ac
G$EA$0$0 == 0x00af
_EA	=	0x00af
G$PX0$0$0 == 0x00b8
_PX0	=	0x00b8
G$PT0$0$0 == 0x00b9
_PT0	=	0x00b9
G$PX1$0$0 == 0x00ba
_PX1	=	0x00ba
G$PT1$0$0 == 0x00bb
_PT1	=	0x00bb
G$PS$0$0 == 0x00bc
_PS	=	0x00bc
G$P0_0$0$0 == 0x0080
_P0_0	=	0x0080
G$P0_1$0$0 == 0x0081
_P0_1	=	0x0081
G$P0_2$0$0 == 0x0082
_P0_2	=	0x0082
G$P0_3$0$0 == 0x0083
_P0_3	=	0x0083
G$P0_4$0$0 == 0x0084
_P0_4	=	0x0084
G$P0_5$0$0 == 0x0085
_P0_5	=	0x0085
G$P0_6$0$0 == 0x0086
_P0_6	=	0x0086
G$P0_7$0$0 == 0x0087
_P0_7	=	0x0087
G$P1_0$0$0 == 0x0090
_P1_0	=	0x0090
G$P1_1$0$0 == 0x0091
_P1_1	=	0x0091
G$P1_2$0$0 == 0x0092
_P1_2	=	0x0092
G$P1_3$0$0 == 0x0093
_P1_3	=	0x0093
G$P1_4$0$0 == 0x0094
_P1_4	=	0x0094
G$P1_5$0$0 == 0x0095
_P1_5	=	0x0095
G$P1_6$0$0 == 0x0096
_P1_6	=	0x0096
G$P1_7$0$0 == 0x0097
_P1_7	=	0x0097
G$P2_0$0$0 == 0x00a0
_P2_0	=	0x00a0
G$P2_1$0$0 == 0x00a1
_P2_1	=	0x00a1
G$P2_2$0$0 == 0x00a2
_P2_2	=	0x00a2
G$P2_3$0$0 == 0x00a3
_P2_3	=	0x00a3
G$P2_4$0$0 == 0x00a4
_P2_4	=	0x00a4
G$P2_5$0$0 == 0x00a5
_P2_5	=	0x00a5
G$P2_6$0$0 == 0x00a6
_P2_6	=	0x00a6
G$P2_7$0$0 == 0x00a7
_P2_7	=	0x00a7
G$P3_0$0$0 == 0x00b0
_P3_0	=	0x00b0
G$P3_1$0$0 == 0x00b1
_P3_1	=	0x00b1
G$P3_2$0$0 == 0x00b2
_P3_2	=	0x00b2
G$P3_3$0$0 == 0x00b3
_P3_3	=	0x00b3
G$P3_4$0$0 == 0x00b4
_P3_4	=	0x00b4
G$P3_5$0$0 == 0x00b5
_P3_5	=	0x00b5
G$P3_6$0$0 == 0x00b6
_P3_6	=	0x00b6
G$P3_7$0$0 == 0x00b7
_P3_7	=	0x00b7
G$RXD$0$0 == 0x00b0
_RXD	=	0x00b0
G$RXD0$0$0 == 0x00b0
_RXD0	=	0x00b0
G$TXD$0$0 == 0x00b1
_TXD	=	0x00b1
G$TXD0$0$0 == 0x00b1
_TXD0	=	0x00b1
G$INT0$0$0 == 0x00b2
_INT0	=	0x00b2
G$INT1$0$0 == 0x00b3
_INT1	=	0x00b3
G$T0$0$0 == 0x00b4
_T0	=	0x00b4
G$T1$0$0 == 0x00b5
_T1	=	0x00b5
G$WR$0$0 == 0x00b6
_WR	=	0x00b6
G$RD$0$0 == 0x00b7
_RD	=	0x00b7
G$P$0$0 == 0x00d0
_P	=	0x00d0
G$F1$0$0 == 0x00d1
_F1	=	0x00d1
G$OV$0$0 == 0x00d2
_OV	=	0x00d2
G$RS0$0$0 == 0x00d3
_RS0	=	0x00d3
G$RS1$0$0 == 0x00d4
_RS1	=	0x00d4
G$F0$0$0 == 0x00d5
_F0	=	0x00d5
G$AC$0$0 == 0x00d6
_AC	=	0x00d6
G$CY$0$0 == 0x00d7
_CY	=	0x00d7
G$RI$0$0 == 0x0098
_RI	=	0x0098
G$TI$0$0 == 0x0099
_TI	=	0x0099
G$RB8$0$0 == 0x009a
_RB8	=	0x009a
G$TB8$0$0 == 0x009b
_TB8	=	0x009b
G$REN$0$0 == 0x009c
_REN	=	0x009c
G$SM2$0$0 == 0x009d
_SM2	=	0x009d
G$SM1$0$0 == 0x009e
_SM1	=	0x009e
G$SM0$0$0 == 0x009f
_SM0	=	0x009f
G$IT0$0$0 == 0x0088
_IT0	=	0x0088
G$IE0$0$0 == 0x0089
_IE0	=	0x0089
G$IT1$0$0 == 0x008a
_IT1	=	0x008a
G$IE1$0$0 == 0x008b
_IE1	=	0x008b
G$TR0$0$0 == 0x008c
_TR0	=	0x008c
G$TF0$0$0 == 0x008d
_TF0	=	0x008d
G$TR1$0$0 == 0x008e
_TR1	=	0x008e
G$TF1$0$0 == 0x008f
_TF1	=	0x008f
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
	.area REG_BANK_0	(REL,OVR,DATA)
	.ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
	.area DSEG    (DATA)
;--------------------------------------------------------
; overlayable items in internal ram 
;--------------------------------------------------------
	.area OSEG    (OVR,DATA)
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
	.area ISEG    (DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
	.area BSEG    (BIT)
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
	.area PSEG    (PAG,XDATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
	.area XSEG    (XDATA)
LdispUpdate$sec$1$1==.
_dispUpdate_PARM_2:
	.ds 2
LdispUpdate$msec$1$1==.
_dispUpdate_PARM_3:
	.ds 2
LdispUpdate$all$1$1==.
_dispUpdate_PARM_4:
	.ds 2
LdispUpdate$min$1$1==.
_dispUpdate_min_1_1:
	.ds 2
LdispUpdate$state$1$1==.
_dispUpdate_state_1_1:
	.ds 1
LemToggle$state$1$1==.
_emToggle_state_1_1:
	.ds 1
LtimerIsr$clkTenDiv$1$1==.
_timerIsr_clkTenDiv_1_1:
	.ds 1
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
	.area XISEG   (XDATA)
Fclock$clkMin$0$0==.
_clkMin:
	.ds 1
Fclock$clkSec$0$0==.
_clkSec:
	.ds 1
Fclock$clkMsec$0$0==.
_clkMsec:
	.ds 1
G$clkOn$0$0==.
_clkOn::
	.ds 1
G$clkEMode$0$0==.
_clkEMode::
	.ds 1
	.area HOME    (CODE)
	.area GSINIT0 (CODE)
	.area GSINIT1 (CODE)
	.area GSINIT2 (CODE)
	.area GSINIT3 (CODE)
	.area GSINIT4 (CODE)
	.area GSINIT5 (CODE)
	.area GSINIT  (CODE)
	.area GSFINAL (CODE)
	.area CSEG    (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area HOME    (CODE)
	.area GSINIT  (CODE)
	.area GSFINAL (CODE)
	.area GSINIT  (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'timerIsr'
;------------------------------------------------------------
;clkTenDiv                 Allocated with name '_timerIsr_clkTenDiv_1_1'
;------------------------------------------------------------
	G$timerIsr$0$0 ==.
	C$clock.c$247$2$1 ==.
;	../src/clock.c:247: static unsigned char clkTenDiv = 0; //divide by 10 for non-enhanced mode
;	genAssign
	mov	dptr,#_timerIsr_clkTenDiv_1_1
;	Peephole 181	changed mov to clr
	clr	a
	movx	@dptr,a
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME    (CODE)
	.area CSEG    (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG    (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'clkToggle'
;------------------------------------------------------------
;------------------------------------------------------------
	G$clkToggle$0$0 ==.
	C$clock.c$44$0$0 ==.
;	../src/clock.c:44: void clkToggle() {
;	-----------------------------------------
;	 function clkToggle
;	-----------------------------------------
_clkToggle:
	ar2 = 0x02
	ar3 = 0x03
	ar4 = 0x04
	ar5 = 0x05
	ar6 = 0x06
	ar7 = 0x07
	ar0 = 0x00
	ar1 = 0x01
	C$clock.c$45$1$1 ==.
;	../src/clock.c:45: (clkOn == TRUE) ? (clkOn = FALSE) : (clkOn = TRUE);
;	genAssign
	mov	dptr,#_clkOn
	movx	a,@dptr
	mov	r2,a
;	genCmpEq
;	gencjneshort
;	Peephole 112.b	changed ljmp to sjmp
;	Peephole 198.b	optimized misc jump sequence
	cjne	r2,#0x01,00103$
;	Peephole 200.b	removed redundant sjmp
;	Peephole 300	removed redundant label 00106$
;	Peephole 300	removed redundant label 00107$
;	genAssign
	mov	dptr,#_clkOn
;	Peephole 181	changed mov to clr
	clr	a
	movx	@dptr,a
;	Peephole 112.b	changed ljmp to sjmp
;	Peephole 251.b	replaced sjmp to ret with ret
	ret
00103$:
;	genAssign
	mov	dptr,#_clkOn
	mov	a,#0x01
	movx	@dptr,a
;	Peephole 300	removed redundant label 00101$
	C$clock.c$46$1$1 ==.
	XG$clkToggle$0$0 ==.
	ret
;------------------------------------------------------------
;Allocation info for local variables in function 'clkReset'
;------------------------------------------------------------
;------------------------------------------------------------
	G$clkReset$0$0 ==.
	C$clock.c$68$1$1 ==.
;	../src/clock.c:68: void clkReset() {
;	-----------------------------------------
;	 function clkReset
;	-----------------------------------------
_clkReset:
	C$clock.c$69$1$1 ==.
;	../src/clock.c:69: clkMin = 0;
;	genAssign
	mov	dptr,#_clkMin
;	Peephole 181	changed mov to clr
	C$clock.c$70$1$1 ==.
;	../src/clock.c:70: clkSec = 0;
;	genAssign
;	Peephole 181	changed mov to clr
;	Peephole 219.a	removed redundant clear
	C$clock.c$71$1$1 ==.
;	../src/clock.c:71: clkMsec = 0;
;	genAssign
;	Peephole 181	changed mov to clr
	C$clock.c$72$1$1 ==.
;	../src/clock.c:72: dispUpdate(0,0,0,1);
;	genAssign
;	Peephole 219.a	removed redundant clear
	clr	a
	movx	@dptr,a
	mov	dptr,#_clkSec
	movx	@dptr,a
	mov	dptr,#_clkMsec
;	Peephole 219.b	removed redundant clear
	movx	@dptr,a
	mov	dptr,#_dispUpdate_PARM_2
	movx	@dptr,a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_3
	clr	a
	movx	@dptr,a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_4
	mov	a,#0x01
	movx	@dptr,a
	clr	a
	inc	dptr
	movx	@dptr,a
;	genCall
;	Peephole 182.b	used 16 bit load of dptr
	mov	dptr,#0x0000
	C$clock.c$73$1$1 ==.
	XG$clkReset$0$0 ==.
;	Peephole 253.b	replaced lcall/ret with ljmp
	ljmp	_dispUpdate
;
;------------------------------------------------------------
;Allocation info for local variables in function 'dispUpdate'
;------------------------------------------------------------
;sec                       Allocated with name '_dispUpdate_PARM_2'
;msec                      Allocated with name '_dispUpdate_PARM_3'
;all                       Allocated with name '_dispUpdate_PARM_4'
;min                       Allocated with name '_dispUpdate_min_1_1'
;state                     Allocated with name '_dispUpdate_state_1_1'
;------------------------------------------------------------
	G$dispUpdate$0$0 ==.
	C$clock.c$96$1$1 ==.
;	../src/clock.c:96: void dispUpdate(int min, int sec, int msec, int all) {
;	-----------------------------------------
;	 function dispUpdate
;	-----------------------------------------
_dispUpdate:
;	genReceive
	mov	r2,dph
	mov	a,dpl
	mov	dptr,#_dispUpdate_min_1_1
	movx	@dptr,a
	inc	dptr
	mov	a,r2
	movx	@dptr,a
	C$clock.c$100$1$1 ==.
;	../src/clock.c:100: if (clkOn == FALSE) {
;	genAssign
	mov	dptr,#_clkOn
	movx	a,@dptr
;	genIfx
	mov	r2,a
;	Peephole 105	removed redundant mov
;	genIfxJump
;	Peephole 108.b	removed ljmp by inverse jump logic
	jnz	00102$
;	Peephole 300	removed redundant label 00135$
	C$clock.c$101$2$2 ==.
;	../src/clock.c:101: state = FALSE;
;	genAssign
	mov	dptr,#_dispUpdate_state_1_1
;	Peephole 181	changed mov to clr
	clr	a
	movx	@dptr,a
;	Peephole 112.b	changed ljmp to sjmp
	sjmp	00103$
00102$:
	C$clock.c$104$2$3 ==.
;	../src/clock.c:104: clkOn = FALSE;
;	genAssign
	mov	dptr,#_clkOn
;	Peephole 181	changed mov to clr
	clr	a
	movx	@dptr,a
	C$clock.c$105$2$3 ==.
;	../src/clock.c:105: state = TRUE;
;	genAssign
	mov	dptr,#_dispUpdate_state_1_1
	mov	a,#0x01
	movx	@dptr,a
00103$:
	C$clock.c$108$1$1 ==.
;	../src/clock.c:108: if (clkEMode == TRUE) {
;	genAssign
	mov	dptr,#_clkEMode
	movx	a,@dptr
	mov	r2,a
;	genCmpEq
;	gencjneshort
	cjne	r2,#0x01,00136$
	sjmp	00137$
00136$:
	ljmp	00123$
00137$:
	C$clock.c$109$2$4 ==.
;	../src/clock.c:109: lcdgotoaddr(CLK_MIN);
;	genCall
	mov	dpl,#0x59
	lcall	_lcdgotoaddr
	C$clock.c$110$2$4 ==.
;	../src/clock.c:110: if (min || all) {
;	genAssign
	mov	dptr,#_dispUpdate_min_1_1
	movx	a,@dptr
	mov	r2,a
	inc	dptr
	movx	a,@dptr
;	genIfx
	mov	r3,a
;	Peephole 135	removed redundant mov
	orl	a,r2
;	genIfxJump
;	Peephole 108.b	removed ljmp by inverse jump logic
	jnz	00104$
;	Peephole 300	removed redundant label 00138$
;	genAssign
	mov	dptr,#_dispUpdate_PARM_4
	movx	a,@dptr
	mov	r2,a
	inc	dptr
	movx	a,@dptr
;	genIfx
	mov	r3,a
;	Peephole 135	removed redundant mov
	orl	a,r2
;	genIfxJump
;	Peephole 108.c	removed ljmp by inverse jump logic
	jz	00105$
;	Peephole 300	removed redundant label 00139$
00104$:
	C$clock.c$111$3$5 ==.
;	../src/clock.c:111: lcdputch(((clkMin%100)/10)+ASCIIBASE);
;	genAssign
	mov	dptr,#_clkMin
	movx	a,@dptr
;	genMod
;	genModOneByte
	mov	r2,a
	mov	b,#0x64
;	Peephole 177.d	removed redundant move
	div	ab
	mov	a,b
;	genDiv
;     genDivOneByte
	mov	b,#0x0A
	div	ab
;	genPlus
;     genPlusIncr
	add	a,#0x30
;	genCall
	mov	r2,a
;	Peephole 244.c	loading dpl from a instead of r2
	mov	dpl,a
	lcall	_lcdputch
	C$clock.c$112$3$5 ==.
;	../src/clock.c:112: lcdputch((clkMin%10)+ASCIIBASE);
;	genAssign
	mov	dptr,#_clkMin
	movx	a,@dptr
;	genMod
;	genModOneByte
	mov	r2,a
	mov	b,#0x0A
;	Peephole 177.d	removed redundant move
	div	ab
	mov	a,b
;	genPlus
;     genPlusIncr
	add	a,#0x30
;	genCall
	mov	r2,a
;	Peephole 244.c	loading dpl from a instead of r2
	mov	dpl,a
	lcall	_lcdputch
	C$clock.c$113$3$5 ==.
;	../src/clock.c:113: lcdputch(':');
;	genCall
	mov	dpl,#0x3A
	lcall	_lcdputch
00105$:
	C$clock.c$115$2$4 ==.
;	../src/clock.c:115: lcdgotoaddr(CLK_EM_SEC);
;	genCall
	mov	dpl,#0x5B
	lcall	_lcdgotoaddr
	C$clock.c$116$2$4 ==.
;	../src/clock.c:116: if (sec || all) {
;	genAssign
	mov	dptr,#_dispUpdate_PARM_2
	movx	a,@dptr
	mov	r2,a
	inc	dptr
	movx	a,@dptr
;	genIfx
	mov	r3,a
;	Peephole 135	removed redundant mov
	orl	a,r2
;	genIfxJump
;	Peephole 108.b	removed ljmp by inverse jump logic
	jnz	00107$
;	Peephole 300	removed redundant label 00140$
;	genAssign
	mov	dptr,#_dispUpdate_PARM_4
	movx	a,@dptr
	mov	r2,a
	inc	dptr
	movx	a,@dptr
;	genIfx
	mov	r3,a
;	Peephole 135	removed redundant mov
	orl	a,r2
;	genIfxJump
;	Peephole 108.c	removed ljmp by inverse jump logic
	jz	00108$
;	Peephole 300	removed redundant label 00141$
00107$:
	C$clock.c$117$3$6 ==.
;	../src/clock.c:117: lcdputch(((clkSec%100)/10)+ASCIIBASE);
;	genAssign
	mov	dptr,#_clkSec
	movx	a,@dptr
;	genMod
;	genModOneByte
	mov	r2,a
	mov	b,#0x64
;	Peephole 177.d	removed redundant move
	div	ab
	mov	a,b
;	genDiv
;     genDivOneByte
	mov	b,#0x0A
	div	ab
;	genPlus
;     genPlusIncr
	add	a,#0x30
;	genCall
	mov	r2,a
;	Peephole 244.c	loading dpl from a instead of r2
	mov	dpl,a
	lcall	_lcdputch
	C$clock.c$118$3$6 ==.
;	../src/clock.c:118: lcdputch((clkSec%10)+ASCIIBASE);
;	genAssign
	mov	dptr,#_clkSec
	movx	a,@dptr
;	genMod
;	genModOneByte
	mov	r2,a
	mov	b,#0x0A
;	Peephole 177.d	removed redundant move
	div	ab
	mov	a,b
;	genPlus
;     genPlusIncr
	add	a,#0x30
;	genCall
	mov	r2,a
;	Peephole 244.c	loading dpl from a instead of r2
	mov	dpl,a
	lcall	_lcdputch
	C$clock.c$119$3$6 ==.
;	../src/clock.c:119: lcdputch('.');
;	genCall
	mov	dpl,#0x2E
	lcall	_lcdputch
00108$:
	C$clock.c$121$2$4 ==.
;	../src/clock.c:121: lcdgotoaddr(CLK_EM_MSEC);
;	genCall
	mov	dpl,#0x5E
	lcall	_lcdgotoaddr
	C$clock.c$122$2$4 ==.
;	../src/clock.c:122: if (msec || all) {
;	genAssign
	mov	dptr,#_dispUpdate_PARM_3
	movx	a,@dptr
	mov	r2,a
	inc	dptr
	movx	a,@dptr
;	genIfx
	mov	r3,a
;	Peephole 135	removed redundant mov
	orl	a,r2
;	genIfxJump
;	Peephole 108.b	removed ljmp by inverse jump logic
	jnz	00110$
;	Peephole 300	removed redundant label 00142$
;	genAssign
	mov	dptr,#_dispUpdate_PARM_4
	movx	a,@dptr
	mov	r2,a
	inc	dptr
	movx	a,@dptr
;	genIfx
	mov	r3,a
;	Peephole 135	removed redundant mov
	orl	a,r2
;	genIfxJump
	jnz	00143$
	ljmp	00124$
00143$:
00110$:
	C$clock.c$123$3$7 ==.
;	../src/clock.c:123: lcdputch(((clkMsec%100)/10)+ASCIIBASE);
;	genAssign
	mov	dptr,#_clkMsec
	movx	a,@dptr
;	genMod
;	genModOneByte
	mov	r2,a
	mov	b,#0x64
;	Peephole 177.d	removed redundant move
	div	ab
	mov	a,b
;	genDiv
;     genDivOneByte
	mov	b,#0x0A
	div	ab
;	genPlus
;     genPlusIncr
	add	a,#0x30
;	genCall
	mov	r2,a
;	Peephole 244.c	loading dpl from a instead of r2
	mov	dpl,a
	lcall	_lcdputch
	C$clock.c$124$3$7 ==.
;	../src/clock.c:124: lcdputch((clkMsec%10)+ASCIIBASE);
;	genAssign
	mov	dptr,#_clkMsec
	movx	a,@dptr
;	genMod
;	genModOneByte
	mov	r2,a
	mov	b,#0x0A
;	Peephole 177.d	removed redundant move
	div	ab
	mov	a,b
;	genPlus
;     genPlusIncr
	add	a,#0x30
;	genCall
	mov	r2,a
;	Peephole 244.c	loading dpl from a instead of r2
	mov	dpl,a
	lcall	_lcdputch
	ljmp	00124$
00123$:
	C$clock.c$128$2$8 ==.
;	../src/clock.c:128: lcdgotoaddr(CLK_MIN);
;	genCall
	mov	dpl,#0x59
	lcall	_lcdgotoaddr
	C$clock.c$129$2$8 ==.
;	../src/clock.c:129: lcdputch(' ');						//put space to remove earlier char if any
;	genCall
	mov	dpl,#0x20
	lcall	_lcdputch
	C$clock.c$130$2$8 ==.
;	../src/clock.c:130: if (min || all) {
;	genAssign
	mov	dptr,#_dispUpdate_min_1_1
	movx	a,@dptr
	mov	r2,a
	inc	dptr
	movx	a,@dptr
;	genIfx
	mov	r3,a
;	Peephole 135	removed redundant mov
	orl	a,r2
;	genIfxJump
;	Peephole 108.b	removed ljmp by inverse jump logic
	jnz	00113$
;	Peephole 300	removed redundant label 00144$
;	genAssign
	mov	dptr,#_dispUpdate_PARM_4
	movx	a,@dptr
	mov	r2,a
	inc	dptr
	movx	a,@dptr
;	genIfx
	mov	r3,a
;	Peephole 135	removed redundant mov
	orl	a,r2
;	genIfxJump
;	Peephole 108.c	removed ljmp by inverse jump logic
	jz	00114$
;	Peephole 300	removed redundant label 00145$
00113$:
	C$clock.c$131$3$9 ==.
;	../src/clock.c:131: lcdputch(((clkMin%100)/10)+ASCIIBASE);
;	genAssign
	mov	dptr,#_clkMin
	movx	a,@dptr
;	genMod
;	genModOneByte
	mov	r2,a
	mov	b,#0x64
;	Peephole 177.d	removed redundant move
	div	ab
	mov	a,b
;	genDiv
;     genDivOneByte
	mov	b,#0x0A
	div	ab
;	genPlus
;     genPlusIncr
	add	a,#0x30
;	genCall
	mov	r2,a
;	Peephole 244.c	loading dpl from a instead of r2
	mov	dpl,a
	lcall	_lcdputch
	C$clock.c$132$3$9 ==.
;	../src/clock.c:132: lcdputch((clkMin%10)+ASCIIBASE);
;	genAssign
	mov	dptr,#_clkMin
	movx	a,@dptr
;	genMod
;	genModOneByte
	mov	r2,a
	mov	b,#0x0A
;	Peephole 177.d	removed redundant move
	div	ab
	mov	a,b
;	genPlus
;     genPlusIncr
	add	a,#0x30
;	genCall
	mov	r2,a
;	Peephole 244.c	loading dpl from a instead of r2
	mov	dpl,a
	lcall	_lcdputch
	C$clock.c$133$3$9 ==.
;	../src/clock.c:133: lcdputch(':');
;	genCall
	mov	dpl,#0x3A
	lcall	_lcdputch
00114$:
	C$clock.c$135$2$8 ==.
;	../src/clock.c:135: lcdgotoaddr(CLK_SEC);
;	genCall
	mov	dpl,#0x5C
	lcall	_lcdgotoaddr
	C$clock.c$136$2$8 ==.
;	../src/clock.c:136: if (sec || all) {
;	genAssign
	mov	dptr,#_dispUpdate_PARM_2
	movx	a,@dptr
	mov	r2,a
	inc	dptr
	movx	a,@dptr
;	genIfx
	mov	r3,a
;	Peephole 135	removed redundant mov
	orl	a,r2
;	genIfxJump
;	Peephole 108.b	removed ljmp by inverse jump logic
	jnz	00116$
;	Peephole 300	removed redundant label 00146$
;	genAssign
	mov	dptr,#_dispUpdate_PARM_4
	movx	a,@dptr
	mov	r2,a
	inc	dptr
	movx	a,@dptr
;	genIfx
	mov	r3,a
;	Peephole 135	removed redundant mov
	orl	a,r2
;	genIfxJump
;	Peephole 108.c	removed ljmp by inverse jump logic
	jz	00117$
;	Peephole 300	removed redundant label 00147$
00116$:
	C$clock.c$137$3$10 ==.
;	../src/clock.c:137: lcdputch(((clkSec%100)/10)+ASCIIBASE);
;	genAssign
	mov	dptr,#_clkSec
	movx	a,@dptr
;	genMod
;	genModOneByte
	mov	r2,a
	mov	b,#0x64
;	Peephole 177.d	removed redundant move
	div	ab
	mov	a,b
;	genDiv
;     genDivOneByte
	mov	b,#0x0A
	div	ab
;	genPlus
;     genPlusIncr
	add	a,#0x30
;	genCall
	mov	r2,a
;	Peephole 244.c	loading dpl from a instead of r2
	mov	dpl,a
	lcall	_lcdputch
	C$clock.c$138$3$10 ==.
;	../src/clock.c:138: lcdputch((clkSec%10)+ASCIIBASE);
;	genAssign
	mov	dptr,#_clkSec
	movx	a,@dptr
;	genMod
;	genModOneByte
	mov	r2,a
	mov	b,#0x0A
;	Peephole 177.d	removed redundant move
	div	ab
	mov	a,b
;	genPlus
;     genPlusIncr
	add	a,#0x30
;	genCall
	mov	r2,a
;	Peephole 244.c	loading dpl from a instead of r2
	mov	dpl,a
	lcall	_lcdputch
	C$clock.c$139$3$10 ==.
;	../src/clock.c:139: lcdputch('.');
;	genCall
	mov	dpl,#0x2E
	lcall	_lcdputch
00117$:
	C$clock.c$141$2$8 ==.
;	../src/clock.c:141: lcdgotoaddr(CLK_MSEC);
;	genCall
	mov	dpl,#0x5F
	lcall	_lcdgotoaddr
	C$clock.c$142$2$8 ==.
;	../src/clock.c:142: if (msec || all) {
;	genAssign
	mov	dptr,#_dispUpdate_PARM_3
	movx	a,@dptr
	mov	r2,a
	inc	dptr
	movx	a,@dptr
;	genIfx
	mov	r3,a
;	Peephole 135	removed redundant mov
	orl	a,r2
;	genIfxJump
;	Peephole 108.b	removed ljmp by inverse jump logic
	jnz	00119$
;	Peephole 300	removed redundant label 00148$
;	genAssign
	mov	dptr,#_dispUpdate_PARM_4
	movx	a,@dptr
	mov	r2,a
	inc	dptr
	movx	a,@dptr
;	genIfx
	mov	r3,a
;	Peephole 135	removed redundant mov
	orl	a,r2
;	genIfxJump
;	Peephole 108.c	removed ljmp by inverse jump logic
	jz	00124$
;	Peephole 300	removed redundant label 00149$
00119$:
	C$clock.c$143$3$11 ==.
;	../src/clock.c:143: lcdputch((clkMsec%10)+ASCIIBASE);
;	genAssign
	mov	dptr,#_clkMsec
	movx	a,@dptr
;	genMod
;	genModOneByte
	mov	r2,a
	mov	b,#0x0A
;	Peephole 177.d	removed redundant move
	div	ab
	mov	a,b
;	genPlus
;     genPlusIncr
	add	a,#0x30
;	genCall
	mov	r2,a
;	Peephole 244.c	loading dpl from a instead of r2
	mov	dpl,a
	lcall	_lcdputch
00124$:
	C$clock.c$147$1$1 ==.
;	../src/clock.c:147: clkOn = state;
;	genAssign
	mov	dptr,#_dispUpdate_state_1_1
	movx	a,@dptr
;	genAssign
	mov	r2,a
	mov	dptr,#_clkOn
;	Peephole 100	removed redundant mov
	movx	@dptr,a
;	Peephole 300	removed redundant label 00125$
	C$clock.c$148$1$1 ==.
	XG$dispUpdate$0$0 ==.
	ret
;------------------------------------------------------------
;Allocation info for local variables in function 'emToggle'
;------------------------------------------------------------
;state                     Allocated with name '_emToggle_state_1_1'
;------------------------------------------------------------
	G$emToggle$0$0 ==.
	C$clock.c$170$1$1 ==.
;	../src/clock.c:170: void emToggle() {
;	-----------------------------------------
;	 function emToggle
;	-----------------------------------------
_emToggle:
	C$clock.c$174$1$1 ==.
;	../src/clock.c:174: if (clkOn == FALSE) {
;	genAssign
	mov	dptr,#_clkOn
	movx	a,@dptr
;	genIfx
	mov	r2,a
;	Peephole 105	removed redundant mov
;	genIfxJump
;	Peephole 108.b	removed ljmp by inverse jump logic
	jnz	00102$
;	Peephole 300	removed redundant label 00110$
	C$clock.c$175$2$2 ==.
;	../src/clock.c:175: state = FALSE;
;	genAssign
	mov	dptr,#_emToggle_state_1_1
;	Peephole 181	changed mov to clr
	clr	a
	movx	@dptr,a
;	Peephole 112.b	changed ljmp to sjmp
	sjmp	00103$
00102$:
	C$clock.c$178$2$3 ==.
;	../src/clock.c:178: clkOn = FALSE;
;	genAssign
	mov	dptr,#_clkOn
;	Peephole 181	changed mov to clr
	clr	a
	movx	@dptr,a
	C$clock.c$179$2$3 ==.
;	../src/clock.c:179: state = TRUE;
;	genAssign
	mov	dptr,#_emToggle_state_1_1
	mov	a,#0x01
	movx	@dptr,a
00103$:
	C$clock.c$182$1$1 ==.
;	../src/clock.c:182: (clkEMode == TRUE) ? (clkEMode = FALSE) : (clkEMode = TRUE);
;	genAssign
	mov	dptr,#_clkEMode
	movx	a,@dptr
	mov	r2,a
;	genCmpEq
;	gencjneshort
;	Peephole 112.b	changed ljmp to sjmp
;	Peephole 198.b	optimized misc jump sequence
	cjne	r2,#0x01,00106$
;	Peephole 200.b	removed redundant sjmp
;	Peephole 300	removed redundant label 00111$
;	Peephole 300	removed redundant label 00112$
;	genAssign
	mov	dptr,#_clkEMode
;	Peephole 181	changed mov to clr
	clr	a
	movx	@dptr,a
;	Peephole 112.b	changed ljmp to sjmp
	sjmp	00107$
00106$:
;	genAssign
	mov	dptr,#_clkEMode
	mov	a,#0x01
	movx	@dptr,a
00107$:
	C$clock.c$183$1$1 ==.
;	../src/clock.c:183: dispUpdate(0,0,0,1);
;	genAssign
	mov	dptr,#_dispUpdate_PARM_2
	clr	a
	movx	@dptr,a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_3
	clr	a
	movx	@dptr,a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_4
	mov	a,#0x01
	movx	@dptr,a
	clr	a
	inc	dptr
	movx	@dptr,a
;	genCall
;	Peephole 182.b	used 16 bit load of dptr
	mov	dptr,#0x0000
	lcall	_dispUpdate
	C$clock.c$185$1$1 ==.
;	../src/clock.c:185: clkOn = state;
;	genAssign
	mov	dptr,#_emToggle_state_1_1
	movx	a,@dptr
;	genAssign
	mov	r2,a
	mov	dptr,#_clkOn
;	Peephole 100	removed redundant mov
	movx	@dptr,a
;	Peephole 300	removed redundant label 00104$
	C$clock.c$186$1$1 ==.
	XG$emToggle$0$0 ==.
	ret
;------------------------------------------------------------
;Allocation info for local variables in function 'clkInit'
;------------------------------------------------------------
;------------------------------------------------------------
	G$clkInit$0$0 ==.
	C$clock.c$208$1$1 ==.
;	../src/clock.c:208: void clkInit(void) {
;	-----------------------------------------
;	 function clkInit
;	-----------------------------------------
_clkInit:
	C$clock.c$210$1$1 ==.
;	../src/clock.c:210: clkOn = FALSE;
;	genAssign
	mov	dptr,#_clkOn
;	Peephole 181	changed mov to clr
	clr	a
	movx	@dptr,a
	C$clock.c$212$1$1 ==.
;	../src/clock.c:212: IE=0x00;									//Disable Interrupts
;	genAssign
	mov	_IE,#0x00
	C$clock.c$213$1$1 ==.
;	../src/clock.c:213: ET1 = TRUE;
;	genAssign
	setb	_ET1
	C$clock.c$215$1$1 ==.
;	../src/clock.c:215: TMOD = TMOD | 0x10;
;	genOr
	orl	_TMOD,#0x10
	C$clock.c$216$1$1 ==.
;	../src/clock.c:216: TF1=FALSE;
;	genAssign
	clr	_TF1
	C$clock.c$218$1$1 ==.
;	../src/clock.c:218: TH1 = 0xDC;									//Load Timer (10ms) - Calculations presented with writeup
;	genAssign
	mov	_TH1,#0xDC
	C$clock.c$219$1$1 ==.
;	../src/clock.c:219: TL1 = 0x25;
;	genAssign
	mov	_TL1,#0x25
	C$clock.c$220$1$1 ==.
;	../src/clock.c:220: TR1=TRUE;									//start timer
;	genAssign
	setb	_TR1
;	Peephole 300	removed redundant label 00101$
	C$clock.c$221$1$1 ==.
	XG$clkInit$0$0 ==.
	ret
;------------------------------------------------------------
;Allocation info for local variables in function 'timerIsr'
;------------------------------------------------------------
;clkTenDiv                 Allocated with name '_timerIsr_clkTenDiv_1_1'
;------------------------------------------------------------
	G$timerIsr$0$0 ==.
	C$clock.c$245$1$1 ==.
;	../src/clock.c:245: void timerIsr(void) {
;	-----------------------------------------
;	 function timerIsr
;	-----------------------------------------
_timerIsr:
	C$clock.c$249$1$1 ==.
;	../src/clock.c:249: TH1 = 0xDC;							//Reload Timer
;	genAssign
	mov	_TH1,#0xDC
	C$clock.c$250$1$1 ==.
;	../src/clock.c:250: TL1 = 0x25;
;	genAssign
	mov	_TL1,#0x25
	C$clock.c$251$1$1 ==.
;	../src/clock.c:251: TR1=1;                          	//Start timer
;	genAssign
	setb	_TR1
	C$clock.c$253$1$1 ==.
;	../src/clock.c:253: if(clkOn == TRUE) {
;	genAssign
	mov	dptr,#_clkOn
	movx	a,@dptr
	mov	r2,a
;	genCmpEq
;	gencjneshort
	cjne	r2,#0x01,00129$
	sjmp	00130$
00129$:
;	Peephole 251.a	replaced ljmp to ret with ret
	ret
00130$:
	C$clock.c$255$2$2 ==.
;	../src/clock.c:255: if(clkEMode == TRUE) {
;	genAssign
	mov	dptr,#_clkEMode
	movx	a,@dptr
	mov	r2,a
;	genCmpEq
;	gencjneshort
	cjne	r2,#0x01,00131$
	sjmp	00132$
00131$:
	ljmp	00116$
00132$:
	C$clock.c$257$3$3 ==.
;	../src/clock.c:257: clkMsec++;
;	genAssign
	mov	dptr,#_clkMsec
	movx	a,@dptr
	mov	r2,a
;	genPlus
	mov	dptr,#_clkMsec
;     genPlusIncr
	mov	a,#0x01
;	Peephole 236.a	used r2 instead of ar2
	add	a,r2
	movx	@dptr,a
	C$clock.c$258$3$3 ==.
;	../src/clock.c:258: if(clkMsec >= 100) {
;	genAssign
	mov	dptr,#_clkMsec
	movx	a,@dptr
	mov	r2,a
;	genCmpLt
;	genCmp
	cjne	r2,#0x64,00133$
00133$:
;	genIfxJump
	jnc	00134$
	ljmp	00105$
00134$:
	C$clock.c$259$4$4 ==.
;	../src/clock.c:259: clkMsec = 0;
;	genAssign
	mov	dptr,#_clkMsec
;	Peephole 181	changed mov to clr
	clr	a
	movx	@dptr,a
	C$clock.c$260$4$4 ==.
;	../src/clock.c:260: clkSec++;
;	genAssign
	mov	dptr,#_clkSec
	movx	a,@dptr
	mov	r3,a
;	genPlus
	mov	dptr,#_clkSec
;     genPlusIncr
	mov	a,#0x01
;	Peephole 236.a	used r3 instead of ar3
	add	a,r3
	movx	@dptr,a
	C$clock.c$262$4$4 ==.
;	../src/clock.c:262: if(clkSec >= 60) {
;	genAssign
	mov	dptr,#_clkSec
	movx	a,@dptr
	mov	r3,a
;	genCmpLt
;	genCmp
	cjne	r3,#0x3C,00135$
00135$:
;	genIfxJump
;	Peephole 112.b	changed ljmp to sjmp
;	Peephole 160.a	removed sjmp by inverse jump logic
	jc	00102$
;	Peephole 300	removed redundant label 00136$
	C$clock.c$263$5$5 ==.
;	../src/clock.c:263: clkSec = 0;
;	genAssign
	mov	dptr,#_clkSec
;	Peephole 181	changed mov to clr
	clr	a
	movx	@dptr,a
	C$clock.c$264$5$5 ==.
;	../src/clock.c:264: clkMin++;
;	genAssign
	mov	dptr,#_clkMin
	movx	a,@dptr
	mov	r3,a
;	genPlus
	mov	dptr,#_clkMin
;     genPlusIncr
	mov	a,#0x01
;	Peephole 236.a	used r3 instead of ar3
	add	a,r3
	movx	@dptr,a
	C$clock.c$265$5$5 ==.
;	../src/clock.c:265: dispUpdate(1,1,1,0);
;	genAssign
	mov	dptr,#_dispUpdate_PARM_2
	mov	a,#0x01
	movx	@dptr,a
	clr	a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_3
	mov	a,#0x01
	movx	@dptr,a
	clr	a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_4
	clr	a
	movx	@dptr,a
	inc	dptr
	movx	@dptr,a
;	genCall
;	Peephole 182.b	used 16 bit load of dptr
	mov	dptr,#0x0001
;	Peephole 251.a	replaced ljmp to ret with ret
;	Peephole 253.a	replaced lcall/ret with ljmp
	ljmp	_dispUpdate
00102$:
	C$clock.c$268$5$6 ==.
;	../src/clock.c:268: dispUpdate(0,1,1,0);
;	genAssign
	mov	dptr,#_dispUpdate_PARM_2
	mov	a,#0x01
	movx	@dptr,a
	clr	a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_3
	mov	a,#0x01
	movx	@dptr,a
	clr	a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_4
	clr	a
	movx	@dptr,a
	inc	dptr
	movx	@dptr,a
;	genCall
;	Peephole 182.b	used 16 bit load of dptr
	mov	dptr,#0x0000
;	Peephole 251.a	replaced ljmp to ret with ret
;	Peephole 253.a	replaced lcall/ret with ljmp
	ljmp	_dispUpdate
00105$:
	C$clock.c$272$4$7 ==.
;	../src/clock.c:272: P1_6 = clkMsec%2;		//Instrumentation to enable measurement on port pin
;	genAnd
	mov	a,r2
	rrc	a
	mov	_P1_6,c
	C$clock.c$273$4$7 ==.
;	../src/clock.c:273: dispUpdate(0,0,1,0);
;	genAssign
	mov	dptr,#_dispUpdate_PARM_2
	clr	a
	movx	@dptr,a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_3
	mov	a,#0x01
	movx	@dptr,a
	clr	a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_4
	clr	a
	movx	@dptr,a
	inc	dptr
	movx	@dptr,a
;	genCall
;	Peephole 182.b	used 16 bit load of dptr
	mov	dptr,#0x0000
;	Peephole 251.a	replaced ljmp to ret with ret
;	Peephole 253.a	replaced lcall/ret with ljmp
	ljmp	_dispUpdate
00116$:
	C$clock.c$278$3$8 ==.
;	../src/clock.c:278: clkTenDiv++;
;	genAssign
	mov	dptr,#_timerIsr_clkTenDiv_1_1
	movx	a,@dptr
	mov	r2,a
;	genPlus
	mov	dptr,#_timerIsr_clkTenDiv_1_1
;     genPlusIncr
	mov	a,#0x01
;	Peephole 236.a	used r2 instead of ar2
	add	a,r2
	movx	@dptr,a
	C$clock.c$279$3$8 ==.
;	../src/clock.c:279: if(clkTenDiv == 10) {
;	genAssign
	mov	dptr,#_timerIsr_clkTenDiv_1_1
	movx	a,@dptr
	mov	r2,a
;	genCmpEq
;	gencjneshort
;	Peephole 112.b	changed ljmp to sjmp
;	Peephole 198.b	optimized misc jump sequence
	cjne	r2,#0x0A,00108$
;	Peephole 200.b	removed redundant sjmp
;	Peephole 300	removed redundant label 00137$
;	Peephole 300	removed redundant label 00138$
	C$clock.c$280$4$9 ==.
;	../src/clock.c:280: clkMsec++;
;	genAssign
	mov	dptr,#_clkMsec
	movx	a,@dptr
	mov	r2,a
;	genPlus
	mov	dptr,#_clkMsec
;     genPlusIncr
	mov	a,#0x01
;	Peephole 236.a	used r2 instead of ar2
	add	a,r2
	movx	@dptr,a
	C$clock.c$281$4$9 ==.
;	../src/clock.c:281: clkTenDiv=0;
;	genAssign
	mov	dptr,#_timerIsr_clkTenDiv_1_1
;	Peephole 181	changed mov to clr
	clr	a
	movx	@dptr,a
00108$:
	C$clock.c$283$3$8 ==.
;	../src/clock.c:283: if(clkMsec >= 10) {
;	genAssign
	mov	dptr,#_clkMsec
	movx	a,@dptr
	mov	r2,a
;	genCmpLt
;	genCmp
	cjne	r2,#0x0A,00139$
00139$:
;	genIfxJump
	jnc	00140$
	ljmp	00113$
00140$:
	C$clock.c$284$4$10 ==.
;	../src/clock.c:284: clkMsec = 0;
;	genAssign
	mov	dptr,#_clkMsec
;	Peephole 181	changed mov to clr
	clr	a
	movx	@dptr,a
	C$clock.c$285$4$10 ==.
;	../src/clock.c:285: clkSec++;
;	genAssign
	mov	dptr,#_clkSec
	movx	a,@dptr
	mov	r3,a
;	genPlus
	mov	dptr,#_clkSec
;     genPlusIncr
	mov	a,#0x01
;	Peephole 236.a	used r3 instead of ar3
	add	a,r3
	movx	@dptr,a
	C$clock.c$287$4$10 ==.
;	../src/clock.c:287: if(clkSec >= 60) {
;	genAssign
	mov	dptr,#_clkSec
	movx	a,@dptr
	mov	r3,a
;	genCmpLt
;	genCmp
	cjne	r3,#0x3C,00141$
00141$:
;	genIfxJump
;	Peephole 112.b	changed ljmp to sjmp
;	Peephole 160.a	removed sjmp by inverse jump logic
	jc	00110$
;	Peephole 300	removed redundant label 00142$
	C$clock.c$288$5$11 ==.
;	../src/clock.c:288: clkSec = 0;
;	genAssign
	mov	dptr,#_clkSec
;	Peephole 181	changed mov to clr
	clr	a
	movx	@dptr,a
	C$clock.c$289$5$11 ==.
;	../src/clock.c:289: clkMin++;
;	genAssign
	mov	dptr,#_clkMin
	movx	a,@dptr
	mov	r3,a
;	genPlus
	mov	dptr,#_clkMin
;     genPlusIncr
	mov	a,#0x01
;	Peephole 236.a	used r3 instead of ar3
	add	a,r3
	movx	@dptr,a
	C$clock.c$290$5$11 ==.
;	../src/clock.c:290: dispUpdate(1,1,1,0);
;	genAssign
	mov	dptr,#_dispUpdate_PARM_2
	mov	a,#0x01
	movx	@dptr,a
	clr	a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_3
	mov	a,#0x01
	movx	@dptr,a
	clr	a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_4
	clr	a
	movx	@dptr,a
	inc	dptr
	movx	@dptr,a
;	genCall
;	Peephole 182.b	used 16 bit load of dptr
	mov	dptr,#0x0001
;	Peephole 112.b	changed ljmp to sjmp
;	Peephole 251.b	replaced sjmp to ret with ret
;	Peephole 253.a	replaced lcall/ret with ljmp
	ljmp	_dispUpdate
00110$:
	C$clock.c$293$5$12 ==.
;	../src/clock.c:293: dispUpdate(0,1,1,0);
;	genAssign
	mov	dptr,#_dispUpdate_PARM_2
	mov	a,#0x01
	movx	@dptr,a
	clr	a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_3
	mov	a,#0x01
	movx	@dptr,a
	clr	a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_4
	clr	a
	movx	@dptr,a
	inc	dptr
	movx	@dptr,a
;	genCall
;	Peephole 182.b	used 16 bit load of dptr
	mov	dptr,#0x0000
;	Peephole 112.b	changed ljmp to sjmp
;	Peephole 251.b	replaced sjmp to ret with ret
;	Peephole 253.a	replaced lcall/ret with ljmp
	ljmp	_dispUpdate
00113$:
	C$clock.c$297$4$13 ==.
;	../src/clock.c:297: P1_4 = clkMsec%2;
;	genAnd
	mov	a,r2
	rrc	a
	mov	_P1_4,c
	C$clock.c$298$4$13 ==.
;	../src/clock.c:298: dispUpdate(0,0,1,0);
;	genAssign
	mov	dptr,#_dispUpdate_PARM_2
	clr	a
	movx	@dptr,a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_3
	mov	a,#0x01
	movx	@dptr,a
	clr	a
	inc	dptr
	movx	@dptr,a
;	genAssign
	mov	dptr,#_dispUpdate_PARM_4
	clr	a
	movx	@dptr,a
	inc	dptr
	movx	@dptr,a
;	genCall
;	Peephole 182.b	used 16 bit load of dptr
	mov	dptr,#0x0000
	C$clock.c$302$2$1 ==.
	XG$timerIsr$0$0 ==.
;	Peephole 253.b	replaced lcall/ret with ljmp
	ljmp	_dispUpdate
;
	.area CSEG    (CODE)
	.area CONST   (CODE)
	.area XINIT   (CODE)
Fclock$__xinit_clkMin$0$0 == .
__xinit__clkMin:
	.db #0x00
Fclock$__xinit_clkSec$0$0 == .
__xinit__clkSec:
	.db #0x00
Fclock$__xinit_clkMsec$0$0 == .
__xinit__clkMsec:
	.db #0x00
Fclock$__xinit_clkOn$0$0 == .
__xinit__clkOn:
	.db #0x00
Fclock$__xinit_clkEMode$0$0 == .
__xinit__clkEMode:
	.db #0x00
